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On a high-level model for the architectural evaluation of an MPEG-ATM ASIC

E.A. Gilarranz, E. Jiménez, S. Alexandres, F. Moreno, J. Meneses

XIII Conference on Design of Circuits and Integrated Systems - DCIS '98, Madrid (Spain). 17-20 November 1998


Summary:

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Keywords: No disponible


Published in: DCIS '98: Proceedings of the XIII Design of Circuits and Integrated Systems Conference, pp: 374-377, ISBN: 84-606-8345-7

Publication date: 20-Nov-1998.


Citation:
E.A. Gilarranz, E. Jiménez, S. Alexandres, F. Moreno, J. Meneses, "On a high-level model for the architectural evaluation of an MPEG-ATM ASIC", presented at XIII Conference on Design of Circuits and Integrated Systems - DCIS '98, Madrid, Spain, 17-20 November 1998. In: DCIS '98: Proceedings of the XIII Design of Circuits and Integrated Systems Conference, pp. 374-377

    Research groups:
  • Instituto de Investigación Tecnológica (IIT)

IIT-98-107C